I. Field of the Invention
The present invention relates to an image signal processing apparatus such as a facsimile machine or a digital copying machine for electrically processing an original image.
II. Description of the Related Art
Conventional apparatuses for electrically performing various types of image processing are exemplified by facsimile machines and copying machines. In most of these apparatuses, an original is illuminated by a light source, and light reflected by the original is read by using an image sensor such as a CCD sensor.
In order to perform, e.g., edge emphasis and smoothing for image data input every line, images on an image data line to be processed and lines before and after the image data line to be processed are stored, and the stored image data of a plurality of lines are read out. Image data of a pixel of interest and image data of pixels adjacent to the pixel of interest are obtained.
In a conventional image processing apparatus of this type, memory ICs 20, 21, and 22 having the same number as that of lines required to be stored are used, as shown in FIG. 1. In an arrangement of FIG. 1, four adjacent pixels A, B, C, and D of the immediately preceding and next lines of a pixel X of interest are used to perform image processing by matrix calculations, as shown in FIG. 2. If the line having the pixels C and D is the (n+2)th line, image data latched by D flip-flops 26 and 28 as data of the pixels C and D are sampled in response to pixel clocks B, as shown in FIG. 3, and the sampled data are input to an arithmetic operation processing unit 41. The data of the pixel X is stored in a memory on the (n+1)th line in accordance with a write signal E, as shown in FIG. 3. Of the image data of the immediately preceding line which are currently read out from the memory 20, the image data latched by a D flip-flop 30 is selected by a selector 39 and input to the arithmetic operation processing unit 41. The data of the pixels A and B are currently stored in the memory 22 as data on the nth line in accordance with a write signal D, as shown in FIG. 9. Of the image data on the second previous line which are currently read out from the memory 22, the image data latched by D flip-flops 35 and 37 are selected by selectors 40 and 38 and input to the arithmetic operation processing unit 41. The image data processed by the arithmetic operation processing unit 41 is output as f(A,B,C,D,X).
The currently input image data of the (n+2)th line is stored in the memory 21 in accordance with a write signal F, as shown in FIG. 9, and are processed the X data of the (n+3)th line and the A and B data of the (n+4)th line. The arrangement in FIG. 1 also includes D flip-flops 27, 29, 31, and 32 to 34, a D flip-flop 36, tristate buffers 23 to 25 for controlling inputs to the input image data memories 20 to 22, and a timing clock generator 42 for outputting clock pulses for operating the D flip-flops 26 to 37, a read/write address signal to the memories 20 to 22, and control signals to the tristate buffers 23 to 25 and the selectors 38 to 40.
The arrangement in FIG. 1 is satisfactory in image processing but poses several problems below:
(1) The circuit is large and complicated;
(2) Since one memory IC is used for a one-line image memory, utilization efficiency of the memory is poor, resulting in high cost (e.g., when versatile ICs are used to perform processing of image data having 2.5 K pixels at a resolution of 8 bits, three 8.times.8 Kbit memories are required); and
(3) Since separate data buses are connected to the respective memories, the number of pins is increased even if the memories are arranged as an LSI.
In order to correct level variations between pixels of level data input to an image processing unit 47 shown in FIG. 1, data representing variations in one-line image data is stored, and level correction is performed on the basis of variation data stored in correspondence with the input image data.
Correction of this type is conventionally called shading correction, and a shading correction circuit is shown in FIG. 4. Distortion correction data associated with a shading correction processing unit 46 and image processing data associated with the image processing unit 47 are read/write accessed with respect to independent memories 48 and 49 in response to different timing clocks from a timing clock generator 43 shown in FIG. 5. The shading correction circuit is used as an entirely independent block. The shading correction circuit includes tristate buffers 44 and 45.
In the arrangement described above, as is apparent from FIG. 4, independent memories must be used to form a shading correction processing data memory 49 and an image data memory 48, increasing the cost and resulting in a bulky apparatus. When these types of data are stored in a common memory IC, shading correction data stored prior to a read operation of an original is undesirably updated by image data stored during reading of the original.
It is difficult to obtain a uniform amount of light throughout the area of a light source such as a fluorescent lamp. Uniform read signals cannot be often read due to a nonuniform distribution of lens transmittance caused by vignetting and nonuniformity in sensitivity of the light-receiving element. According to the present invention, nonuniformity of the read signal is called shading distortion. Therefore, in order to obtain an excellent read signal, a mechanism for electrically correcting shading distortion is proposed.
Shading distortion is often conventionally corrected by a circuit shown in FIG. 6. An image sensor 301 such as a CCD sensor receives light reflected by an original. Basically, light beams reflected by predetermined areas are sequentially caused to be incident on the image sensor 301 while the original or the sensor is moved. An output from the image sensor 301 is amplified by an amplifier 303, and the amplified signal is compared by a comparator 317 with a slice level formed by a rheostat 315. A comparison result is output as a binary signal.
Read errors often occur due to shading error caused by variations in amount of light emitted from the light source and variations in sensor. Therefore, the circuit shown at the center of FIG. 6 is arranged.
An output 303a from the amplifier 303 is input to an A/D converter 309 and a peak hold circuit 313, and the A/D converter 309 converts the output from the amplifier 303 into a digital signal having a predetermined number of bits. The digital signal is output to a memory 307. The data stored in the memory 307 is converted into analog data by a D/A converter 311. The peak hold circuit 313 holds a maximum value of the read signal, and an output 313a therefrom is supplied to the A/D converter 309 and the D/A converter 311 as A/D and D/A conversion reference values. An analog signal output from the D/A converter 311 is applied to the rheostat 315 and is used as the slice level for binarization by the comparator 317.
Data transfer between the memory 307, the A/D converter 309, and the D/A converter 311 is controlled by a read control unit 305 comprising a microcomputer or the like.
In the above arrangement, in order to correct shading distortion and sensitivity variations in the elements of the image sensor 301, a white reference surface such as a white reference board arranged at a predetermined position inside the apparatus is scanned by pre-scanning performed prior to reading of the original image. An output from the image sensor 301 at this time is digitized by the A/D converter 309, and the digital data is temporarily stored in the memory 307. During original reading, the data stored in the memory 307 is converted into an analog voltage by the D/A converter 311. The analog voltage is divided by the rheostat 315 and the divided voltage is used as a slice level.
During reading of the white reference level, the A/D conversion reference voltage is the output 313a from the peak hold circuit 313 which corresponds to a maximum bright portion of a unit line of the white reference surface.
As in the arrangement of FIG. 6, in an apparatus for obtaining shading correction data by using peak-holding a video signal during pre-scanning, since the peak value is held, a discharge time constant of peak holding is set to be large. For this reason, a charge/discharge constant is also large. A potential of a peak hold capacitor and a storage timing of shading correction data are not taken into consideration. A capacitor potential during the power-on operation is unstable.
It takes a relatively long period of time until the capacitor is charged and the peak hold potential is stabilized during pre-scanning. When shading data is stored prior to stabilization of the peak hold potential, correct correction data cannot often be obtained.
When pre-scanning is started upon the power-on operation, shading data is obtained based on an unstable peak value. Therefore, correct shading correction cannot be performed.
As in the arrangement shown in FIG. 6, in an apparatus for obtaining shading correction data by using peak-holding a video signal during pre-scanning, performing shading correction of the held peak value of an image signal during image reading, obtaining a slice level on the basis of the shading-corrected peak value, and performing binarization (multivalue processing), the peak hold circuit performs the same operations during pre-scanning and image reading.
The following problems are posed during reading of the original image, as shown in FIG. 7.
When a highest white level is present in a one-line image as in an area A of an original shown in FIG. 7, and a peak value having a magnitude equal to that during pre-scanning is obtained, as shown in FIG. 8(A), a correct threshold level can be set. However, when a highest white level is absent in a halftone image as in an area B of an original shown in FIG. 7, a maximum value of the image signal is peak-held, and shading correction is performed by using this value as a maximum peak value, thereby setting a threshold level. Therefore, the threshold level is smaller than that obtained based on the highest white level, and the processed image becomes whitish.
As a result, in an original including both patterns of the areas A and B, even if a background color is uniform, stripes having different densities are undesirably formed in the reproduced image by threshold level differences.